core::arch

Module aarch64

1.59.0 · Source
Available on AArch64 or target_arch="arm64ec" only.
Expand description

Platform-specific intrinsics for the aarch64 platform.

See the module documentation for more details.

Structs§

  • SYExperimental
    Full system is the required shareability domain, reads and writes are the required access types

Constants§

Functions§

  • __crc32bcrc
    CRC32 single round checksum for bytes (8 bits).
  • __crc32cbcrc
    CRC32-C single round checksum for bytes (8 bits).
  • __crc32cdcrc
    CRC32 single round checksum for quad words (64 bits).
  • __crc32chcrc
    CRC32-C single round checksum for half words (16 bits).
  • __crc32cwcrc
    CRC32-C single round checksum for words (32 bits).
  • __crc32dcrc
    CRC32 single round checksum for quad words (64 bits).
  • __crc32hcrc
    CRC32 single round checksum for half words (16 bits).
  • __crc32wcrc
    CRC32 single round checksum for words (32 bits).
  • __arm_mte_create_random_tagExperimentalmte
    Return a pointer containing a randomly generated logical address tag.
  • __arm_mte_exclude_tagExperimentalmte
    Add a logical tag to the set of excluded logical tags.
  • __arm_mte_get_tagExperimentalmte
    Load an allocation tag from memory, returning a new pointer with the corresponding logical tag.
  • __arm_mte_increment_tagExperimentalmte
    Return a pointer with the logical address tag offset by a value.
  • __arm_mte_ptrdiffExperimentalmte
    Calculate the difference between the address parts of two pointers, ignoring the tags, and sign-extending the result.
  • __arm_mte_set_tagExperimentalmte
    Store an allocation tag for the 16-byte granule of memory.
  • __dmbExperimental
    Generates a DMB (data memory barrier) instruction or equivalent CP15 instruction.
  • __dsbExperimental
    Generates a DSB (data synchronization barrier) instruction or equivalent CP15 instruction.
  • __isbExperimental
    Generates an ISB (instruction synchronization barrier) instruction or equivalent CP15 instruction.
  • __nopExperimental
    Generates an unspecified no-op instruction.
  • __sevExperimental
    Generates a SEV (send a global event) hint instruction.
  • __sevlExperimental
    Generates a send a local event hint instruction.
  • __tcancelExperimentaltme
    Cancels the current transaction and discards all state modifications that were performed transactionally.
  • __tcommitExperimentaltme
    Commits the current transaction. For a nested transaction, the only effect is that the transactional nesting depth is decreased. For an outer transaction, the state modifications performed transactionally are committed to the architectural state.
  • __tstartExperimentaltme
    Starts a new transaction. When the transaction starts successfully the return value is 0. If the transaction fails, all state modifications are discarded and a cause of the failure is encoded in the return value.
  • __ttestExperimentaltme
    Tests if executing inside a transaction. If no transaction is currently executing, the return value is 0. Otherwise, this intrinsic returns the depth of the transaction.
  • __wfeExperimental
    Generates a WFE (wait for event) hint instruction, or nothing.
  • __wfiExperimental
    Generates a WFI (wait for interrupt) hint instruction, or nothing.
  • __yieldExperimental
    Generates a YIELD hint instruction.
  • _prefetchExperimental
    Fetch the cache line that contains address p using the given RW and LOCALITY.