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java.lang.Objectcom.sun.electric.tool.io.input.verilog.VerilogData.VerilogModule
public class VerilogData.VerilogModule
Class to represent subcells
Method Summary | |
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java.util.List<java.lang.Object> |
getAllSorted()
Returns list of ports and wires sorted by name |
java.util.List<VerilogData.VerilogInstance> |
getInstances()
Function to return list of VerilogInstance objects in the module. |
java.lang.String |
getName()
Function returning the name of the module |
java.util.Collection<VerilogData.VerilogPort> |
getPorts()
Function to return collection of VerilogPort objects in the module. |
java.util.List<VerilogData.VerilogWire> |
getWires()
Function to return list of VerilogWire objects in the module. |
boolean |
isPrimitive()
Returns true if this was defined as a 'primitive' instead of a 'module'. |
boolean |
isValid()
Returns if module is valid, i.e., theinformation was 100% read from the file |
Methods inherited from class java.lang.Object |
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clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait |
Method Detail |
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public boolean isValid()
public java.lang.String getName()
public boolean isPrimitive()
public java.util.List<java.lang.Object> getAllSorted()
public java.util.List<VerilogData.VerilogInstance> getInstances()
public java.util.List<VerilogData.VerilogWire> getWires()
public java.util.Collection<VerilogData.VerilogPort> getPorts()
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